The important thing here is they have a bonding method working for stacking DRAM with logic and apparently also solved the thermals well enough too.

Logic is usually rated to run up to 110*C but DRAM processes aren't rated for such high temperatures and perform worse the hotter they get in terms of retention etc.

There are also some novel approaches here in terms of banking choices and impact on refresh times as a result.

The end result that matters for normies is that if this process is turns out to be a success it will challenge and perhaps beat HBM.

That in turn matters because this process is vastly more wafer efficient than HBM for the same bandwidth. Which in theory would ease supply on DRAM wafers.

Except it is also more efficient in terms of energy/bit/s so very likely what will happen is chips will still target the same TDP and just use even more of this rather than consume less wafers because that is just how AI is today.

Disclaimer: I work for a competing company that also makes AI inference chips.

Probably the biggest/most interesting of the annual semiconductor conferences, held in August each year at Stanford.

Fried chunks of potato with chilli sauce.