I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC-V is great for embedded because companies can build it into custom chips with specifically the functionality they need, and because of how cheap it is for low-end use cases since there's no license fees.

The only real point of contention I see between the two is that this piece goes on to talk about how it's a selling point that RISC-V can be used for both low-end 10 cent microcontrollers, and high-end multi-core processors running Linux. Personally I don't see the benefit of this since you're going to have to recompile your software anyway, and since all the RISC-V SBCs I'm aware of have significantly worse performance and efficiency than comparably priced ARM SBCs.

I don't really understand the author's conclusions about cost and shipping, and how RISC-V is cheaper and more accessible to people outside the US and Europe. He first talks about how getting $1 worth of chips can cost $60-$200 in shipping for him due to his location... but then by the end claims that RISC-V gives him "an architecture that arrives in my country at ten cents a part".

I don't get how both things can be true. The cost to ship something to Trinidad and Tobago has nothing to do with whether it's ARM or RISC-V; shipping the same weight of either kind of chips should cost exactly the same amount. Yes, maybe the chip cost itself of a particular ARM-based model is $0.15 while the equivalent RISC-V chip costs $0.10, but if the issue (for him and other people who live outside US/Europe) is that shipping costs are orders of magnitude more expensive than the thing being shipped, that chip-cost difference becomes irrelevant.

I think he does make a great point about how fragmentation does give you better optionality: ARM is sort of like cable TV where you have a small number of product categories that each bundle a particular set of features, whereas with RISC-V you design something bespoke that does exactly what you need and nothing more. But again, this isn't going to affect shipping costs.

I believe there will come a day when RISC-V has comparable or better performance than ARM and x86_64.

This is based on history: I remember when x86 performance compared to the DEC Alpha, PA-RISC, SPARC, etc. was a joke. There was a time when, if you wanted real performance, you needed to pony up $20,000-$50,000 for a workstation with a MIPS/PA-RISC/SPARC/Alpha/whatever processor. All these workstations smoked the x86 computers of the era.

However, people were buying x86 computers at a far higher rate, giving Intel (and AMD) the money needed to invest in better chip designs and better fabs. Linux was, at the same time, gaining traction and, around the time the dot-com bubble popped and there were no longer companies with the money needed to get Sun SPARC workstations (or what not) at $50,000 or more a pop to start up a web business, x86 computers running Linux had nearly the same performance at a much lower price. Once the Itanium sank and x86_64 was mainstream, x86_64 was the ISA of choice for performance workstations and servers, and the RISC ISAs that survived were now mainly used in the embedded space. Indeed, ARM was never a high performance RISC processor, and it was the one that took over the embedded space while PA-RISC, Alpha, and SPARC died.

The ISA for what were cheap computers become the highest performance ISA around.

It has been only in the 2020s that RISC processors have gotten x86_64 levels of performance, notably in the the Apple M series of processors. So now ARM, an ISA which was geared for cheap embedded devices, has become a high performance processor, in line with x86.

Right now, RISC-V is mainly being used in cheap embedded components. Considering that x86 and ARM also were made for cheap computing, until becoming the dominant high end processor, history tells us that the cheapest ISA is the one which will become the highest performance one.

RISC-V currently has about the same performance as a high end Raspberry Pi. I predict it will have medium-level PC performance by the end of the 2020s.

He says:

> From that position, the difference between a ten cent part and a one dollar part is not a rounding error and it is not a detail you get to wave past on the way to the interesting discussion about encodings

Yet earlier:

> I pay anywhere from US $60 to US $200 to ship one dollar chips that people everywhere else get free shipping on

Seems to me that the difference between a 10c chip and a $1 chip are a rounding error when the shipping cost dominates so much?

I love the article, it's a breath of fresh air compared to the usual bay area centric takes. However there's just one issue:

> The students I want to teach are in the same position, and so are the ones in Nigeria and Bangladesh

It does not take $60 to ship small sub $1 chips from Asia to Nigeria/Bangladesh. These two countries are all on global trade routes (both supply and demand) and the expensive last mile delivery costs are fairly low there too.

I disagree with some points in "RISC-V They Should Have Known Better".

For example, author claims that saving and restoring all registers in interrupt handler takes too long. But this can be solved alternatively, for example: split register set for use in interrupt and normal code. Or simply add two register banks and allow switching between them (assuming interrupts are not re-enterable). But author claims that ARM is better because it has a "store multiple registers" instruction. It wouldn't help because storing multiple registers still requires multiple bus cycles, and microcontroller probably has a 32-bit bus and no cache, so saving N registers requires N memory cycles - no matter, is it done with a single instruction (ARM), or with multiple (RISC-V). And implementing this ARM instruction makes the core more complicated with little benefit.

As for 3 instructions for array access, in a simple loop a compiler can convert index access to pointer increment.

The real weak points of RISC-V are:

- no trap on integer overflow and invalid FP results . Overflows cause vulnerabilities

- no optimizations for fast context switch, which is required for dumping legacy unsafe monolithic kernels, especially in age of AI actively searching for vulns

- weird vector extensions

> He derives the case for the chip and then spends the rest of the article annoyed that the chip exists. This is almost satirical.

His criticisms are entirely valid, because why can't the the thing that has a free spec and will likely dominate that space ... also be good too? Can't we have all the nice things?

To me it feels like the difference in positions is "this could be made better" vs. "but this is already so much better than before". Both are right.

Maybe I'm missing something important so far...

I lost the thread of his argument when he brought up the shipping expense:

> I pay anywhere from US $60 to US $200 to ship one dollar chips that people everywhere else get free shipping on

then follows with:

> the difference between a ten cent part and a one dollar part is not a rounding error and it is not a detail you get to wave past on the way to the interesting discussion about encodings.

When shipping is so expensive, doesn't the difference between $1 and $.10 unit cost become less relevant?

Nice read!

Though it feels a bit strange that "I have exceeded the allowed number of requests. (500 times)" when I first clicked the article and I'm pretty sure I don't share the ip of my self-hosted VPN with anyone.

Working archived copy - https://archive.is/9FaRC

Absolutely hugged to death.

My perspective using Nix is that it's hardly worth standardizing ISAs. Recompiling software is easy and we should have a Cambrian explosion of different designs.

This is especially good if one scopes out a family of ISAs that are ABI compatible such that one can compile down to a semi-pre-optimized portable IR, and just do the last bit per ISA.

Original HN discussion referenced:https://news.ycombinator.com/item?id=49298035

I don't think the Author disagree with what the original article wrote. If anything everything he said seems to reassert what the original article intended to state.

And while things has died down a lot in the past few years, there is a reason why I wrote the line.

"You do not criticise The Rusted Holy Grail and the Riscy Silver Bullet."

This is the sort of content I endure this place for. Thanks for posting.

>He derives the case for the chip and then spends the rest of the article annoyed that the chip exists.

>This is almost satirical.

That's all that needs to be said.

It's like comparing Unity and Godot. Unity is better in every single way but one, you have to license it from a very poorly ran company.

You don't "own" your games, they ship with black box spyware. The pricing for using it can change from day to day.

I swear the Unity C level employs a Magic 8 Ball and consults it for key management decisions.

If you need to edit the Unity Engine source code your looking at a secret additional licensing fee which is certainly unaffordable for hobbyist and most indies.

Vs Godot which is completely free under the MIT license.

Everything about the above can be said for ARM as well.

RISC-V is free for everyone to play with. If you think it sucks you can always fork it and jerryrig it to work on existing hardware.

If you have money you can even get custom hardware for your forked RISC-V.

I very much enjoyed reading this article, I'm optimistic in seeing what OPs students come up with. This is life changing technology that's essentially available to all.

"Now price the same journey on the other side, forget x86-64 and that duopoly, patent minefield, with multi-thousand dollar debug probes; we'll take a look at ARM."

The 386 and 486 patent should have expired more than 20 years ago. No one tried to open source it. https://github.com/EI2030/Low-power-E-Paper-OS/blob/master/0... There were many companies that had clones in the early 90s, and I wonder whether any of them still have the rights to manufacture them.

" That is a better reason than elegance. and I want to tell Mr Grinberg, that the word priviledge he tosses around in his article also extends beyond the ISA depending on where you are in the world."

Grinberg is an emigre from Ukraine, which isn't the most privileged place in the world. In fact his research articles go deeper than the average software developer in Silicon Valley.

Who uses the term '3rd world' 'third world' anymore?

High shipping costs are the reason why many countries in the Caribbean and Latin America usually have freight forwarders They locally market themselves as package lockers, po boxes or online shopping companies. It turns out the expensive shipping cost doesn't scale linearly with package size or weight. The expensive shipping cost is a base price, and only rises slowly with package weight and size.

So, these freight forwarders rent a warehouse in the US, an LLC in the US for paying rent, and give away the address of the warehouse to their customers locally. Customers use the address when shopping online and their packages are dropped off at the warehouse. Then they employ people in the US to collect customer packages in the US into large bags, which are then shipped to the destination country via DHL.

DHL does charge the exorbitant shipping to third world country fees of 35 to 60 to 200 dollars that people here complain about. These fees are the base price for shipping, no matter how small or light the package is.

Then, to recover the fees, packages are handed over to customers at a minimum of 2.50 dollars per pound, per package.

For the business to work, income from these packages has to exceed the shipping cost. In Panama, you can probably fit 100 average packages into a 25 pound bag. That bag costs like 75 dollars to ship from the US to Panama. Then you make 250 dollars when people collect the packages. Local customers trade speed for cost, trading the 35 dollar base shipping price for 2.50 dollars and an extra week of lead time to wait for collection to complete in the US. They also don't have to go to the airport to pick up their packages since the business is ideally close to their house.

Businesses like Temu ship directly from china via companies such as PRS logistics and J&T express so their shipping costs to third world countries are lower and can thus bypass freight forwarders entirely so freight forwarders only remain for items sold within the US, where shipping to third world countries has a base price of at least 35 dollars, and whenever shipping to your country costs that much as a base price, even if it ships from China, or when a business only offers shipping to or within the US.

Sometimes, temu is more expensive than a Freight forwarder, but the user is freed from having to handle any logistics like using a particular address and choosing and registering with a package locker and travelling to pick up packages there and the shipping price remains under 10 dollars. However you still have to use a Freight forwarder for items over 120 dollars such as laptops and some car parts because temu doesn't carry those. Freight forwarding is also done in the exact way described above in China instead of the US because websites like taobao rarely offer overseas shipping. Again employing people in china and renting warehouses near airports there. Freight forwarders also offer marine freight instead of the default air freight.

Of course, renting a warehouse and employing people in the US is expensive by local standards. Worker pay alone is around 1600 dollars vs 600 locally. So, there are only a few freight forwarders which often offer b2b, and then package lockers use their sevices. To the end customer there is no distinction between a package locker and freight forwarder. Some freight forwarders also offer B2C package locker services, others are B2B only.

For example nelcon cargo, Uno express, airbox, mail boxes etc are vertically integrated because they are both B2B and B2C, cft cargo is B2B only. most package lockers do not do freight forwarding themselves and use a B2B service for freight forwarding, the package locker only offers proximity and thus convenience to neighborhood customers. Air freight via Miami international airport is the default, and most freight forwarder warehouses are located near this airport. In China, the bottleneck is not price, but speaking Chinese, so it is often run by locals of Chinese descent and is more niche than shipping from the US. This also means that taobao has a lower shipping volume and thus a smaller local market.

Buyee and Zen market, so called proxy services, are very similar to freight forwarders but the service is allowing foreigners overseas to purchase in Japan because most japanese companies do not offer overseas shipping. And there are a few freight forwarders in china as well.

I think I figured it out: there's wrought iron over the window...

I have no idea what's going on here, but the title alone gave me second-hand engineering stress. Solid post.

Rate Limit Exceeded Too Many Requests

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A 3rd World Embedded Engineer Learns About Caching Generated HTML The Hard Way.

https://archive.md/9FaRC

That is just an amazing website and initiative.

https://rvembedded.com/products/project-lab/

Definitely interested!

You have exceeded the allowed number of requests.

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with no vpn

"Rate Limit Exceeded"

Does anyone have an archive?

This blog post is very defensive and argumentative, which I guess is fair considering Dmitry's post is similarly inflammatory, but most of it was really not convincing:

> Simply put, the things a high-end CPU needs are diametrically opposed to the things a small cost-saving microcontroller core needs.

> The conclusion he draws is that no single ISA can serve both ends, and that RISC-V fans are fooling themselves, in theory the premise is true. The conclusion does not follow, and I can show you why from three parts sitting on my desk as we speak.

> CH32V003. This is the cheap "RV32EC" with sixteen registers, no multiplier, no divider, machine mode only,

> CH32H417. A dual core MCU that is unmatched in performance to price point and is at the higher end of the MCU line

> Baochip. A VexRISC-V with an MMU built around a stack thats open from silicon to os Baochip-1x: A Mostly-Open, 22nm SoC for High Assurance Applications

Uh, which one of these is a datacenter server cpu? Or a workstation cpu? Or at least a developer laptop cpu? How about a Raspberry Pi 4 level SBC (supporting latest ubuntu and fedora releases, driving a display that runs a browser and plays video ...)

There's a lot of angry indignation but it seems obvious that Dmitry is quite right about this.

But I found this is where this blog post starts making a lot of sense:

> Has anyone tried adding an MMU to a Cortex-M? The physical tradeoffs are real, the difference is that with RISC-V, the ISA owner does not decide for you where that boundary must be drawn. If you want virtual memory on ARM you license a Cortex-A instead, which is a different core family, a different profile, a different negotiation, and a different royalty.

> Compare what happened with Baochip. The RISC-V privileged specification defines supervisor mode and Sv32 paging as optional things an implementation may provide. VexRISC-V is an open core, somebody added an MMU to it. bunnie built a chip around it and runs a microkernel with real process isolation on it

Yeah, that is a good point. We're still in the low-end specialty realm, but that is real interesting advantage for RISC-V, a good reason for it to exist.

As for shipping to Trinidad and Tobago ... this post is trying too hard to turn this into moral issue, but it seems a bit random (OrangePi cost $30 and shipped free? you can also get arm-based and stuff from the same places), and the vast majority of people don't live on semi-remote islands, it doesn't make sense to consider this kind of accessibility above all else, and it's strange to blame Dmitry for not thinking of you here.

Beautiful.

I read the "They Should Have Known Better" article and forgot it. I've seen this before. I know it's hot air and does not matter, and I can't afford to worry about things that don't matter.

When I say I've seen this before, I'm talking about ancient history: controversies so old and so laughable that they've been forgotten. When, for example, AMD handed the world AMD64/X86_64, the same things were said: fragmentation, legacy+flawed ISA, etc. That has not aged well, and "They Should Have Known Better" won't either.

The "fragmentation" argument has no merit. The jumble of extension names and profiles in RISC-V are, in fact, direct evidence that RISC-V is succeeding: it's the RISC-V ecosystem aggressively, collaboratively and successfully tackling pain points and solving them. This is what RISC-V is supposed to be doing, and it's doing it, and empires are being built on it.

Take this part: "The existence of CLIC and various proprietary 'fast IRQ' / auto-stacking extensions is an additional indictment."

CLIC is miraculous. It's an advanced embedded interrupt controller, and it's wonderful: it brings the equivalent of ARM's NVIC to RISC-V, except better. You can implement an extremely efficient scheduler that guarantees deadlock-free concurrency: bare-metal, real-time, hardware-accelerated "Fearless Concurrency," on an MCU with no RTOS![1] Its appeal is so great that, despite still being a draft spec, the leading RISC-V MCU designers are adopting it. Espressif's ESP32-S31 has it, for example. The chaotic emergence of this awesome thing is what is condemned as an "indictment."

Speaking of ESP32-S31, it's going to be a monster when silicon becomes available in quantity. This RV Embedded writing mentions MMUs a lot. Guess what? The S31 has an Sv32 MMU. It can run Linux. Not μClinux. Real Linux. It's already been done twice (that I know of) on the Espressif eval boards. People like Armstrong Subero are going to change the world with it.

That's the froth of RISC-V. The ground is shaking, and the peanut gallery of ISA wizards has no power over it. In a few years, after RISC-V has lain waste to our world of proprietary ISAs and Western IP regime rent seeking, "They Should Have Known Better" will look as silly to everyone as it already looks to me.

[1] https://rtic.rs/2/book/en/

The author of the article just got a fan.

Some serious stuff he builds on top of those chips.

More than half the article is AI slop. Sad.

Just an unlucky spawn point. We need to focus on ourselves. "oh no shipping to some remote island is expensive compared to NYC that has next day free on everything" Well, duh.

yo this is actually some really fire reading. i had to read it twice then go back and read the original that he's responding to here. i feel full of wonder right now seeing people who are this deep into compsci debating merits in the marketplace of ideas, there's just so much going on globally with computing that i never even get to see. super fascinating to read about the different constraints at play here even the global socioeconomic ones and how they apply to the chip world in general. it sounds like risc-v's real play is democratizing access to the entire embedded stack