Quadrupling code performance with a "useless" if

106 pointsposted 19 hours ago
by birdculture
(purplesyringa.moe)

24 Comments

exmadscientist

27 minutes ago

A huge part of the problem here is that you're playing with the 8-bit registers. They work, but they're like travelling the back roads: the CPU designers put all their effort into the big highway next door, and not so much into keeping the back roads clear. They're infamous for random weird stalls and such. I wouldn't be surprised at all if there's dependency chain tracking weirdness using them.

If you can change the type on `next_j` over to `unsigned` (or `size_t` or ...) then a lot of weird stuff goes away. The dependency chains in address calculation at the beginning of the loop are gone too, which seems a win. (Or I'm sure there's some other, more complicated, way to get the compiler to get rid of them.) But if the space hit from using `unsigned` is allowable, I'd expect it to be both faster and less brittle.

The processor doesn't really know what you're up to, it only sees registers. When `j` is stored in `ecx`/`rcx` and `ecx` isn't changing, it knows it's free to push ahead pretty far on speculation. If the update to `ecx` is rare, putting it behind a well-predicted-not-taken branch will make it go away, as far as the speculation engine is concerned, and let the processor go far and fast. (The rollback on mispredict can be pretty painful, but, well, that's out-of-order execution for you.) That's what we're really trying to accomplish here: stuff that single register write behind a rare branch, somehow.

Here's what that can look like: https://clang.godbolt.org/z/1ss6hsEKb

Note that I disabled unrolling because some approaches got unrolled more than others. (I saw no unrolling, 2x, and more!) Comparing them without unrolling is fairest, I think, though it's also interesting to see how far they can unroll without assistance.

I also found that clang didn't need any additional fencing (or care if it was present), but gcc did, so there's an `asm volatile` style fence, which I think is a lot more clear than the other tricks. (Your mileage may vary; people who've done a lot of low-level work won't blink at these, while others will just stare agape. Perhaps also not blinking, but for opposite reasons!)

(Mind you, I didn't actually run any of this, so, well, you get what you pay for.)

patrulek

11 hours ago

You can utilize MLP (memory-level parallelism) and reduce memory latency by reading whole 8 bytes of next_j at every iteration. Just do something like

`uint64_t packed_next_j = *(uint64_t*)(&next_j[i])`

and then just shift right to find proper j. This way you remove dependency on previous iteration. Did you tried that?

purplesyringa

10 hours ago

The right-shift is the problem. You need to shift right by `j * 8`, which itself requires a shift to compute (`j << 3`), so you have two shifts on the critical path, resulting in a latency of 2 cycles. It's better than a load, but it's still noticeable.

patrulek

9 hours ago

2 cycles vs ~5 cycles is still nice improvement plus its more deterministic (but not that fast in optimistic case; better in pessimistic case) than `if` appraoch and probably easier to "invent" and reason about. Definitely not that cool as your `if` solution though :)

OptionOfT

10 hours ago

Don't you need the previous iteration to find out how much you need to shift right?

patrulek

9 hours ago

Yes you need, but the initial problem here were sequential loads from L1 into registers.

pillmillipedes

13 hours ago

wow, what an interesting optimization! how would you even figure out that that if is what's needed to make it faster?

purplesyringa

10 hours ago

I knew the loop was latency-bound and I couldn't easily decrease the latency, so I knew I had to somehow avoid the dependency chain at all. I remembered that CPUs predict some properties of memory accesses (e.g. they might predict that a store and then a load from different addresses likely don't intersect), but not addresses, so I thought about another way to force it to predict `j` well. Branch prediction turned out to be the simplest way to do so.

Actually, since then I've found out that I could reduce latency by replacing a load on the critical chain with a vector shuffle instruction (`pshufb`, takes just 1 cycle on x86). Ironically, if I realized that sooner, I probably wouldn't have tried to use branch prediction at all!

mcv

17 hours ago

Interesting. I thought modern CPU optimisation required avoiding branches, but here adding the branch allows the branch pediction to parallelise what it otherwise couldn't.

zipy124

16 hours ago

It does and the key here is that adding the if is akin to avoiding a branch, since getting data then doing something with it is a hidden branch if you already have the data. All this code does is formalise the hidden branch so that it can be avoided when possible.

nextaccountic

13 hours ago

> since getting data then doing something with it is a hidden branch if you already have the data

You mean that the naive, simpler code, despite not having an if, has a "branch" on the microarchitectural state? (which is like.. if we have this already in cache, do something. if not, do something else)

    // Find the optimal encoding for each symbol.
    // Chunk boundaries are located where encodings change.
    uint8_t encoding[n_symbols];
    uint8_t j = 0; // always start with encoding 0 for simplicity
    for (int i = 0; i < n_symbols; i++) {
        j = next_j[i][j];
        encoding[i] = j;
    }

summarybot

14 hours ago

That's pretty cool. Is there something obcluding the compiler from noticing this parallelization opportunity without the new `if` ?

My understanding is the assignment and the evaluation are somehow coupled in this case based on the essay, but I could use an explanation.

purplesyringa

14 hours ago

The optimization in the post is only advantageous if `next_j[i][j] == j` holds often enough. Without prior knowledge, the compiler can't know if it's going to improve performance, and the worst losses are greater than the best wins (branch misprediction is very expensive), so it decides not to interfere.

anematode

19 hours ago

Brilliant! Hadn't seen this technique before.

anthonj

17 hours ago

I think this call for something similar to "__builtin_expect" or linux' likely()/unlikely().

Not very clean, but better than inserting obscure optimisations in the source.

gblargg

17 hours ago

Assuming compilers are smart enough to insert an unnecessary branch to break the dependency.

vitally3643

14 hours ago

That's what the hints are for. Expect/likely/unlikely are the programmer informing the compiler what it should expect and how it should optimize

purplesyringa

17 hours ago

That would be great, if only it worked as intended! From the perspective of an optimizing compiler, `a == b ? a : b` is worse than `b` regardless of the probability you assign to `a == b`.

ETA: someone on Lobsters (https://lobste.rs/s/1an425/quadrupling_code_performance_with...) noticed that `[[unlikely]]` actually works on LLVM (not on GCC, and with worse codegen on LLVM, but it's still good to know) -- updated the post.

MaxBarraclough

17 hours ago

I was wondering the same thing. Also, could profile-guided optimisation help here?

anirudhak47

19 hours ago

latency optimization is a skill. I liked how you went till CSE pass. I myself wrote several passes to go to lowest latency possible

akoboldfrying

18 hours ago

This is really surprising! I've never considered the possibility that using an equality test to skip a write that would be a no-op could break a dependency and thus lead to higher perf overall if the "equal" outcome occurs often enough. This might be applicable in many situations where you "edit" some data in-place, but most of the time there are few or no changes.

6510

16 hours ago

my js brain keeps thinking encoding[i] = next_j[i][j];