sylware
8 hours ago
The future would be standard ISA assembly writting with a good management of "alternatives" for fast paths.
I want hardcore performant RISC-V implementations for mobile/server/desktop already :)
Latest silicon node, ofc.
8 hours ago
The future would be standard ISA assembly writting with a good management of "alternatives" for fast paths.
I want hardcore performant RISC-V implementations for mobile/server/desktop already :)
Latest silicon node, ofc.