Running a 68060 CPU in Quadra 650

61 pointsposted 14 hours ago
by zdw

33 Comments

lproven

28 minutes ago

Can someone with a bit more chip-level knowledge explain to me why nobody has put a PiStorm into a classic Mac yet?

https://github.com/captain-amygdala/pistorm

If there are problems with the ISA or something, they're much much easier to tweak here. It already works in multiple models of Amiga, including both 68000 and 68020, and there's at least one effort to get one working in an Atari ST...

zatkin

8 hours ago

I appreciate how in the YouTube video on the repo's README, his cat walks right on top of his project, and he doesn't even react at all. The cat just gets out of the way all by itself. But I guess it _had_ to be part of the clip, heh.

zozbot234

7 hours ago

inb4 the fastest 68k-based Mac is an Apollo Vampire running a Macintosh emulator

vardump

2 hours ago

Vampire is not really a 68k, it's an FPGA based system. A kind of fantasy could-have-been system.

LeoPanthera

8 hours ago

Was the 040/060 always supposed to be the end of the line, or might we have seen more advanced "68k" chips if sales had continued?

fredoralive

6 hours ago

If there was demand for more high performance 68k processors, presumably Motorola would have made more. But by the time of the 68060 customers for high end 68k had either already moved onto various RISC architectures (Mac, UNIX workstations) or were dead / dying (ST, Amiga).

A related question would be if Motorola could pull off what Intel did with x86, and drag the architecture to be competitive with RISC. Part of Intel's trick was that x86 isn't the most CISCy of chips, so it was easy to implement a processor that takes a "RISCy subset" of instructions and translate them into one or two µops. 68k is perhaps more on the VAX side of things, so whether they'd be able to pull off the same trick is a bit unclear. Clearly we need to check the parallel universes where IBM chose the 68008 for Chess instead of the 8088...

actionfromafar

6 hours ago

I checked one of the adjacent ones, and there Motorola used traps and microcode internally for emulation of some of the CISCier instructions and a fast RISCy core for the rest.

Everyone was encouraged to move on to the fast subset and the new multimedia instructions.

Tuna-Fish

4 hours ago

The problem was mainly in x86, existing code already mostly used instructions that belonged to the fast subset, and on 68k, it didn't. So while you could evolve the instruction set towards a saner design (and the 68060 was well on the way towards that), only new code would benefit from it.

fch42

14 minutes ago

on the m68k, the "cisc-y-ness" is in the many many addressing modes, whereas x86 in that particular aspect of the architecture has always been rather "risc-y" (read: rather limited compared to other CISC architectures, including m68k).

The core instruction set of the m68k, as far as ALU/FPU is concerned, is simple enough. But converting the addressing modes to "risc building blocks" (μops or whatever term you like to use) is harder.

robinsonb5

3 hours ago

And of course that's exactly what they did with Coldfire - rounding off the inconvenient corners of the ISA to produce CPUs with lower power requirements and able to run at higher clock speeds.

Someone

3 hours ago

> only new code would benefit from it.

Not only new code. Old code in an high-level language would benefit, too, if the language compiler was updated and the code recompiled.

fredoralive

2 hours ago

Not everyone has that sort of luxury of access to source etc., people want their existing binaries to run faster.

Also, if you need to recompile to get a performance boost, why not recompile for a cleaner modern architecture? You can always use an emulator for legacy code, if it isn't going to run fast on a modern CPU either way...

actionfromafar

3 hours ago

Or sometimes, binary pached.

Findecanor

an hour ago

This. Don't underestimate the amount of M68K code written in assembly language.

kalleboo

6 hours ago

Motorola wanted to replace the 68000 series with their RISC design, the 88000, so it was probably always going to end there. Their customers were also all in full RISC hype fever and were looking for RISC chips to move to.

In Apple's search for a RISC chip, didn't want to be stuck being single-sourced again so they had IBM and Motorola work together to launch PowerPC instead, so Motorola gave up on the 88k.

Findecanor

an hour ago

I have seen mentioned a couple of times that the 88K would have had some inherent design flaw that made the architecture a dead end. I have never found an explanation what that would have been though.

Perhaps this had just been a misunderstanding of a second-hand statement. Its first iteration was flawed in that it was an expensive multi-chip solution with few buyers. The second was more integrated though.

ido

9 hours ago

Isn't the 68060 backward compatible? Why wouldn't it run the same binaries compiled for other 68k CPUs?

homarp

8 hours ago

68060 has a reduced integer and floating point instruction set ( Motorola cut down some of the lesser used instructions in order to keep the die size under control. However, to remedy this they made available an ISP (Integer Support package) and FPSP (Floating point support package))

Bus error stack frames have been changed significantly

(per the bulletin board discussion linked below)

Someone

8 hours ago

https://www.cpu-world.com/CPUs/68060/index.html:

“Supervisor mode of the Motorola 68060 CPU differs from the 68040 due to changes in exception processing. User mode of the Motorola 68060 is object-compatible with MC68040, assuming that the CPU uses special software to simulate a few instructions that were present in 68040 CPU and are missing in MC68060.”

bell-cot

7 hours ago

Big picture: Motorola's 68K architecture was a case study in Death by Feature Creep.

Short-term: The 68K was loved by assembly language programmers - a big thing, in the 80's. And it felt and sounded so cool for Motorola to add even more great features to each generation of the architecture.

Long-term: If you want your microprocessor architecture to stay a thing in higher-performance desktop/server use (vs. toaster ovens & thermostats & such) - then you need to have a few Senior Implementation Engineers looking a decade or so ahead, and saying "NO" to cool features that could turn into implementation hell.

The 68060 was where the long-term issues really caught up with the 68K architecture, and it hit the brick wall / grave stone. Which is why Motorola pretty much dumped their 68K for IBM's Power architecture, in the PowerPC.

Findecanor

an hour ago

Motorola added too many complex addressing modes in the '020, that they dropped already with the next CPU, the '030.

rjsw

7 hours ago

Motorola built the 88K in between the 68K and PowerPC.

badgersnake

6 hours ago

So nothing like x86 then?

Tuna-Fish

6 hours ago

x86 is not nearly as bad as 68k, more by lucky accident than design. As it was a stop-gap project designed to hastily extend an earlier design to 16 bit and 20-bit addressing while the proper cpu of the future (iAPX432) needed a few extra months to bake, the designers didn't have enough time to properly fubar the core of the instruction set. This made x86 assembly much less nice to write than the nearly fully orthogonal 68k, but also made it much easier to make the subset of it that was in actual use faster later.

68k designers were not being dumb when they designed it. At that time pretty much the entire industry was deep in the weeds of "closing the semantic gap", or making CPUs directly run the operations that would be encoded in high-level languages. All CPUs designed to this paradigm were doomed, and how doomed they ended up being depended mainly on how well they managed to implement it.

IBM's 801 and Patterson's RISC would blow it all up in the early 80's.

TheAmazingRace

2 hours ago

A shame, really. 68k was (and is) much more approachable for those learning assembly. No need to deal with 64k segmented memory, for instance.

As an aside… National Semiconductor also had an ill-fated architecture in the NS32000, which I also wish took off. On paper, it really did a lot right (VAX-like design, flat memory model, 32-bit almost immediately out of the gate) yet NS was woefully incapable of producing masks without bugs. It took them many tries to get it right, and before then, they already were being beat to market by their competition.

Then to add insult to injury, NS’ own compiler for NS32000 chips was producing rather unoptimized code. It took GNU porting GCC to the platform in 1987 for them to fully realize their potential, years after they missed their chance.

If NS did have their act together… dare I say an IBM PC built around their CPU would have been possible and more interesting than the 8088 they ultimately went with.

badgersnake

6 hours ago

I’ve got a 68060 RC (MMU, no FPU) in my Amiga 1200 and it seems to work alright. The full 68060 is insanely expensive these days though, you could get a decent Ryzen for a lot less money.

TheAmazingRace

2 hours ago

In your specific case too, I believe there are options for soft emulation of the FPU if you needed support for one in a pinch. I can’t say how the performance is, but I’d imagine it would be insanely slow.