You’re right, it doesn’t mean anything related to a physical dimension. Its sole purpose is to show shrinkage (in terms of density) compared to the previous generation.
That being said, assuming that the Chinese “3nm” is comparable to the rest of the industry’s nodes, I highly doubt they can make it.
“7nm” is/was the last node size that could be produced without EUV (while still economically viable). And that was with multiple-patterning on Immersion scanners.
China doesn’t and can’t have EUV. They do have Immersion, but that’s now also under export controls.
Well they only can’t have euv because of the Netherlands. Depending what the eu or the USA does the Netherlands can stop listening to the USA.
Idk what incentive they would have to do that given iirc they’re selling basically every EUV machine they can make right now?
I believe EUV was licensed to ASML since it came out of a defense department research project. So the US probably does have a say for machines that use EUV.
Well maybe. But without further experimentation it would probably not that viable. It also needs a lot of tech which is also developed by a European company, that has basically 90% of that market.
And know the us has a president that is not eu friendly, we will See what happens.
> China doesn’t and can’t have EUV.
Famous last words. /s
Everyone else is missing the point here. SMIC (China’s main semi fab) isn’t the company manufacturing these chips. They haven’t broken into anything close to 3nm-class chips yet. This just means that TSMC is going to manufacture a 3nm chip for Xiaomi. The important part for China here is this proves that they can design modern chips, not they necessarily have the manufacturing capability yet.
How likely is it that TSMC will manufacture it in the current political climate?