Inside a Ferroelectric RAM Chip

88 pointsposted 9 hours ago
by chmaynard

36 Comments

heironimus

2 hours ago

These saved me from a redesign 25 years ago. I had an 8051 with 256 bytes of RAM and a serial EEPROM with limited writes. Replacing the EEPROM with a serial FRAM allowed me to increase the effective RAM. I had to do some tweaking and figuring because it was so much slower. Also, FRAMs had limited writes AND reads, but on the order of billions instead of millions. Billions of reads are a lot, but you still had to be careful.

jonathrg

8 hours ago

Texas Instruments has FRAM in some of their microcontrollers. It's really pleasant to use. You write to it like any other part of RAM, the only difference being that the bytes stay where they are when you lose power. With something flash you need to be more careful with how you use it.

technothrasher

8 hours ago

I've been using it in a few projects at work as a replacement for flash backed serial RAM. It drops right in, as it is pin and function compatible with other small SPI and I2C nvram and eeprom chips, and isn't really much more expensive in small capacities.

beeflet

6 hours ago

What is the latency like vs DRAM?

polpo

5 hours ago

In my experience with parallel FRAM, it’s as fast as SRAM and is a drop in replacement with the same timing.

A lot of folks have replaced battery backed SRAM with FRAM on game consoles.

beeflet

3 hours ago

Holy cow thats cool. So It's like an expensive nonvolatile replacement for volatile memory. I wonder if in the future there could be computers with no sense of "memory vs storage", that it would all just be a single contiguous "memory".

Instead of turning off the computer and hibernating, you just turn off the LCD backlight and the IO.

jasomill

2 hours ago

While implemented virtually rather than physically, two well-known (and very different) examples of systems that unify memory and secondary storage under a single addressing scheme are Multics (1969) and the IBM System/38 (1978).

Note that the present-day IBM i née AS/400 is a direct descendent of the System/38.

References:

https://en.wikipedia.org/wiki/Single-level_store

https://dl.acm.org/doi/pdf/10.1145/363095.363139

http://bitsavers.org/pdf/ibm/system38/G580-0237-1_IBM_System...

https://archive.org/details/insideas4000000solt/page/171/mod...

grishka

3 hours ago

You would still need to turn the CPU off though. Or do you suggest replacing the registers and caches and all other volatile memory with this stuff?

soganess

2 hours ago

I'm not sure what the performance/persistence implications of this (FRAM) actually are...

But to your point, simply copying the processor state to a known location in FRAM (0xFFFFFFF0) and having the start routine read state from that location seem like a very low overhead solution to the problem.

How long would it really take to do something your computer does as part of preemptive multi-tasking? Nanoseconds? Milliseconds? We are talking about $order(hundred) of instructions

therein

3 hours ago

I really like their FRAM products too. Ultra low power, high data endurance. They have this NFC FRAM MCU product that can be powered by the reader itself.

I want someone to incorporate these into their hardware wallet products. Would also be very cool for high endurance data storage. I understand we are talking about kilobytes of storage but still they have very small packaging anyway, just use them (the SPI bus FRAM products) by the dozens.

kens

9 hours ago

Author here if anyone has questions about ferroelectric RAM...

throwaway81523

8 hours ago

FRAM seems great and I wonder why it's not used more. TI has some MSP430 processors that include it, but when they went to the MSP432 (ARM architecture), they said something about a process incompatibility. Some ARM or Risc-V processors with FRAM would be great.

Any idea what the process issue is? Would you say FRAM is on the decline? Super low powered CMOS ram used to also be a thing, but I haven't seen that in a while either.

Added: article mentions flash memory is $15/gbit. I guess that is NOR flash? NAND is way way cheaper, more like $15/terabit.

Another question: is it reasonable to say that FRAM automatically implements secure erasure? Like if you overwrite a cell, can you be sure that the old contents are gone? With flash, you have to worry about stuff like sector remapping other the covers.

Here's a 4 mbit Adafruit FRAM breakout, out of stock but smaller sizes are available: https://www.adafruit.com/product/4719

TI MSP430FR5969 development board: https://www.ti.com/tool/MSP-EXP430FR5969 That is a fancy MSP430 processor with 64KB of FRAM and 2KB of regular ram. The board is $16. The regular ram is I think a little bit faster than the FRAM and good for "infinite" write cycles instead of mere trillions, so I guess you need both. They have a few more of these boards including one with 128KB of FRAM if I remember right.

kens

7 hours ago

The metal ions from the ferroelectric material can contaminate the silicon production line. I read that they would manufacture the silicon die at one facility (i.e. make the transistors) and then do the rest of the fabrication (the ferroelectric material, top metal, etc.) at another facility to avoid contamination. Maybe that's the process incompatibility that you mentioned. I don't know if FRAM is on a decline or will hold on as a niche product.

throwaway81523

2 hours ago

Hmm, thanks, I'm surprised those MSP430 cpus aren't more expensive if their fabrication is that complicated. So it sounds like the ARM designs (I guess basically hard macros from ARM Ltd.?) aren't compatible with that type of process. I wonder if a RISC-V design starting with downloaded HDL would be easier. I hope it happens: FRAM is really cool in concept and I've had a few application ideas where it would be great.

cushychicken

6 hours ago

It’s real popular in the niches that use it. Industrial controls systems really seem to love it.

I’ve heard that some real fast control systems like to have it as a recovery method to save state in event of major system hiccups.

kragen

8 hours ago

minor correction: the central atoms in pzt are not zircon but zirconium. zircon is zirconium silicate, the form in which zirconium is almost always found in nature. there is no silicate in pzt

also, the atom that can substitute for zirconium in that central position is not lead but titanium. you do explain this in the following sentence, but first you say 'causes the lead or [zirconium] atom to physically move', which is wrong

kens

8 hours ago

Thanks, I've fixed those!

kragen

8 hours ago

happy to help!

rwmj

8 hours ago

Bubble memory next please! It was the next big thing for storage for a brief period in the late 1980s.

MBCook

2 hours ago

Oh wow I’d never heard of bubble memory before. That’s crazy.

The (in retrospect) strange and complicated things people came up with to store bits before magnetic core got popular and then later silicon wiped the field are so much more interesting than what we’ve got now.

I get why silicon won. But it’s just nowhere near as fun as bubble memory, delay lines, or CRTs.

kens

8 hours ago

Someone gave me a board with bubble memory chips to examine, but when I opened up the chip it turned out to be regular DRAM; they were mistaken about the type of memory.

johnklos

8 hours ago

I've always wondered if the ROMs on my VAXstation 4000/90a are ferroelectric. The DEC manuals refer to it as flash ROM, but I've also heard / read it referred to as FRAM, although I couldn't say I remember where or when.

But 512KB of FRAM at $3 per megabit would make that pricier than the machine! So I wonder what it has in it instead.

Interesting! Thanks :)

kens

8 hours ago

It wouldn't make sense to use FRAM for ROM, since the big feature of FRAM is fast write speed. I found one DEC document that says the Flash ROM on one product is the Intel 28F008SA, an 8Mb flash chip. So I expect the VAXstation uses boring flash too, rather than costly FRAM.

Link: https://bitsavers.org/pdf/dec/semiconductor/arm/EC-QU5KA-TE_...

sroussey

7 hours ago

What would be good for DRAM read speeds, and not care too much write speeds?

I’m thinking of keeping an LLM’s weights in a storage RAM, where it would be updated only every few months.

namibj

6 hours ago

DRAM or SLC NAND. Be careful with read-induced disturbance on the latter, though.

aidenn0

7 hours ago

Are the parts pin-compatible with parallel sram? I've always thought it would be nice to replace the battery-backed SRAM in old video game cartridges with MRAM or FeRAM

polpo

5 hours ago

I’ve replaced battery backed SRAM in several game consoles and other devices with FRAM (Neo Geo CD, Sega Saturn, an HP oscilloscope) and for some it’s drop-in, and in a few you have to bodge some lines.

rbanffy

37 minutes ago

Won’t that negatively impact the life expectancy of the device? FRAM is rated for trillions of reads and, if the SRAM is frequently read, a trillion reads isn’t that much.

kens

6 hours ago

The FM1808B and FM1608B might work for you. These are 32Kx8 and 8K×8 FRAM chips with standard SRAM pinouts, in DIP packages. If you don't need a DIP, you have a lot more choices.

aidenn0

6 hours ago

The SOIC look like they could work as-is in a gameboy, which (thanks to Pokemon) is the most common request for replacing batteries. The DIPs could be made to work in most NES games too, I suspect.

jaygreco

8 hours ago

I have one! Any idea if the PZT cubes are added using the typical photoresist masking/etching or are they placed on die using some other process?

kens

8 hours ago

From looking at various patents, I believe they put down a layer of PZT and then etch it into cubes with photolithography. Look at the process diagram at the bottom of my article, step 1128.

anonymousDan

8 hours ago

Any thoughts on how it compares to Intel Optane NVM? Also is there any particular material you envision as a potential successor for it?

Brian_K_White

5 hours ago

I've been using MRAM instead as soon as I read that the way FRAM works internally is that every read is actually destructive and but written right back after the read.

I don't want that in something that's meant to replace a mask rom.

therein

3 hours ago

I remember there being some document in which TI describes how this is done atomically at a physical level so there is no way that you can end up losing power and having the read-triggered write fail to complete.

tonetegeatinst

8 hours ago

I wonder if I could sketch a single fram using klayout. Hmmmm